CS2214
Computer Architecture
and Organization
Address : Polytechnic Institute of NYU
Computer
Science and Engineering
Six Metrotech
Center
Brooklyn,
New York 11201
| Tuesday |
Wednesday | Thursday |
Friday |
||
| 8 - 9 |
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| 9 - 10 |
CS2204 Lab B RH 227 |
CS2204 Lab A RH 227 |
CS/EE 1012 Lecture RH 615 |
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| 10 - 11 |
CS2214 Lecture RH 116 |
CS2204 Lab B RH 227 |
CS2214 Lecture RH 116 |
CS2204 Lab A RH 227 |
CS/EE 1012 Lecture RH 615 |
| 11 - 12 |
CS2214 Lecture RH 116 |
CS2204 Lab B RH 227 |
CS2214 Lecture RH 116 |
CS2204 Lab A RH 227 |
|
| 12 - 1 |
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| 1 - 2 |
CS2204 Lab C RH 227 |
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| 2 - 3 |
CS2204 Lecture JAB 475 |
CS2204 Lecture JAB 475 |
CS2204 Lab C RH 227 |
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| 3 - 4 |
CS2204 Lecture JAB 475 |
CS2204 Lecture JAB 475 |
CS2204 Lab C RH 227 |
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| 4 - 5 |
CS2204 Lab D RH 227 |
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| 5 - 6 |
CS2204 Lab D RH 227 |
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| 6 - 7 |
CS6143 Lecture JAB 774 |
CS2204 Lab D RH 227 |
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| 7 - 8 |
CS6143 Lecture JAB 774 |
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| 8 - 9 |
CS6143 Lecture JAB 774 |
The lectures are in RH 116
The recitations are all in RH 803 and RH 317
1) CS2204 (C- or better for undergraduate computer engineering students)
- The CS 2214 prerequisite list is as follows :
- You will satisfy either 1 or 2 below :
2) a) CS2134 (C- or better) and
b) MA2312 and MA2322
- If you satisfy the prerequisite(s) but cannot register, please see your advisor or me to register.
- The textbook :
- We will use the revised print of the 4th edition :
- Computer Organization and Design, David A. Patterson and John L. Hennessy, 4th edition revised print, Morgan Kaufman, 2009. ISBN : 978-0-12-374750-1.
- The CS 2214 course is on computer hardware. Specifically, it focuses on instruction sets and main components of a computer : assembly/machine language programming, the central processing unit (CPU), memory and input/output (I/O) controllers
- The instruction set is a major portion of what we call computer architecture. The CPU, memory and I/O controllers are covered in the context of computer organization, also known as microarchitecture.
- Then, we will cover improving the performance and capacity of computers at a cost efficient way by using pipelining and a memory hierarchy.
- Pipelining will be applied on the CPU to improve its performance
- The memory hierarchy will be used to improve the capacity of the compute
- Again, study sections C.1 - C.3, C.5, C.7- C.8 and C.10 - C.11. Study them except pages on HDLs to be prepared for the course.
- See the handouts below.
1) Students can see the professor or the TA about the course,
the homework, the simulator and any other
matter.
2) Professor's office hours
and
contact information :
- Room
: 10.009 at 2 MetroTech Center
- Open-door
policy
- If
the door is closed, he might be teaching
- haldun dot photon dot poly dot edu
- (718) 260-3101
- (718) 260-3609 Fax
4) All handout files
are at the course
web site : http://cis.poly.edu/cs2214.
5) For any problem, students should not hesitate to contact the professor and the TAs.
Department of Computer Science and Engineering
Polytechnic Institute of NYU